CVE-2022-42336

描述

Mishandling of guest SSBD selection on AMD hardware The current logic to set SSBD on AMD Family 17h and Hygon Family 18h processors requires that the setting of SSBD is coordinated at a core level, as the setting is shared between threads. Logic was introduced to keep track of how many threads require SSBD active in order to coordinate it, such logic relies on using a per-core counter of threads that have SSBD active. When running on the mentioned hardware, it's possible for a guest to under or overflow the thread counter, because each write to VIRT_SPEC_CTRL.SSBD by the guest gets propagated to the helper that does the per-core active accounting. Underflowing the counter causes the value to get saturated, and thus attempts for guests running on the same core to set SSBD won't have effect because the hypervisor assumes it's already active.

如何修補 CVE-2022-42336

要修補 CVE-2022-42336,請將受影響套件升級到下列已修補版本。

• —升級至 4.17.1-r1 或更新版本
• —升級至 4.17.1+2-gb773c48e36-1 或更新版本

CVE-2022-42336 正在被利用嗎?

低 — EPSS 為 0.3%,目前沒有觀察到大規模利用活動。

受影響套件(2)

• from 0, < 4.17.1-r1
• from 0, < 4.17.1+2-gb773c48e36-1

CVSS 分數

參考連結(2)

• ADVISORYsecurity-tracker.debian.org/tracker/CVE-2022-42336
• ADVISORYsecurity.alpinelinux.org/vuln/CVE-2022-42336